Embedded memory IP: Via ROMs
sROMet TITAN DV
Benefits
- REDUCE DIE COST
- Via 1 programmable ROM
- Key patent for high density with a single programming layer
- Gain in density over alternative ROM designs
- EXTEND BATTERY LIFE
- Significant gain in dynamic power consumption compared to alternative ROM
- No leakage in memory plane and minimal leakage in memory periphery
- MAKE INTEGRATION EASIER
- Depending on memory capacity. A large number of MUX options can be selected between 8 and 128
- High flexibility for address range
- ENABLE RIGHT ON FIRST PASS DESIGN
- Complete mismatch validation of the memory architecture taking in account local and global dispersion
Performances
Variants
VT Bit cell
VT Periphery
Operating Voltage
Capacity
Option mode
55 uLP
Dolphin bit cell
SVT
Nominal voltage:
1.1V +/-10% and 1.2V +/-10%
Low voltage:
0.9 V +/-10%
1.1V +/-10% and 1.2V +/-10%
Low voltage:
0.9 V +/-10%
512 bits - 0.5 Mbits
-
55 uLP eFlash
Dolphin bit cell
SVT
SVT
SVT
Nominal voltage:
1.2 V +/-10%
Low voltage:
0.9 V +/-10%
1.2 V +/-10%
Low voltage:
0.9 V +/-10%
512 bits - 0.5 Mbits
-